Software doesn't deal with EMP hardening. Hardware does. Bits soft setting themselves is almost impossible to debug natively, since your debugger can be effected by the same error.
Your bet met is running the algorithm ~20-100 times and comparing the outputs, then averaging.
I'm confused. Who said anything about trying to harden against EMP in software?
My understanding is that the real threat from EMP is physical destruction of the circuits by inducing voltages beyond what the wiring can handle. Any bit flips would be transient, since the EMP doesn't last very long (thus the P part).
Trying to use software to protect your chips from being fried by hundreds or thousands of volts being shoved through parts that weren't designed to handle it is clearly not viable.
>>I worked on these systems on the B-52H for a few years. The systems even felt somewhat archaic back then, but there was a reason: they were probably the most reliable military avionics systems I've come across.
>I'd wager [..] that resilience in the face of EMP was probably a big factor too
The poster was talking about software reliability, which the next poster asked if software reliability was related to EMP hardening.
It was quite clear to me that he was talking about hardware reliability, what with the explicit mentions of CRTs, fragility, and resistance to vibration and shock.
The only mention of software in the whole comment is a brief comment about "upgrades to both the system and the software".
Your bet met is running the algorithm ~20-100 times and comparing the outputs, then averaging.
It's pretty horrible honestly.