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> But there's already been a process slip.

They mean to say "another" process slip, but they've said that so many times it's starting to look bad. (And if their leadership was less clueless, they'd realize their mistakes there, but I've digressed....)

Another place the marketers have taken over is in the naming. It's widely accepted that TSMC 7FF "7nm" is the peer to Intel P1274 "10nm", and general consensus is that TSMC 5FF "5nm" is the peer to Intel P1276 "7nm".



> It's widely accepted that TSMC 7FF "7nm" is the peer to Intel P1274 "10nm"

I think there's one huge difference there though. As I understand it TSMC 7nm is an EUV process while Intel's 10nm is not.

So it looks like the bottom line is TSMC has mastered the next major fab technology and Intel has not.


TSMC's original 7nm process 7FF did not use EUV. They did introduce EUV for certain layers in N7+, their "second generation" 7nm process. Don't confuse N7+ with N7P, the performance-improved version of 7FF....

There's more information at https://fuse.wikichip.org/news/2567/tsmc-talks-7nm-5nm-yield... or https://community.cadence.com/cadence_blogs_8/b/breakfast-by... .

(This is why I always try to give the full name of the process, in as much specificity as I know it; it's very easy to talk at cross purposes about N7+ and N7P despite them being quite different.)


OK, but it still looks like N7+ has been shipping for almost a year so I think my main point still stands.




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