I've never understood this. Why not just have the memory controller transparently encrypt/decrypt the data using a random key generated at boot (or hell - even a unique key programmed per-controller at the factory)? Then you get actual integrity validation against any kind of error/bit flip, not just Row Hammer. Then you'd also be using ECC for it's purpose of correcting errors rather than hoping it's also catching attacks (which it turns out it can't).
"Why not" turns out to have quite an expensive answer (both in silicon and runtime latency). If you just cipher using a standard algorithm like AES then performance isn't great, but adding integrity protection to it further slows that down. Of course, you can use a lighter cipher, but then you don't have the years of cryptanalysis that gives everyone some assurance.
I think the jury is still out on AMD SME and Intel TME in terms of their respective performance hits.
